Reliability of electrical/electronic circuitry is crucial in many environments, such as, for example, medical devices, weapons systems, communications system, etc. Such systems and devices utilize various types of electronic circuits, including integrated circuits. As circuits age, they become less reliable until, at some point in time, performance becomes unacceptable. Thus it is important to estimate the effective life of a circuit during the initial circuit design to enable design optimization.
One aging defect, commonly known as Negative Bias Temperature Instability (NBTI), can be attributed to a shift of a threshold voltage of a circuit transistor element. Threshold voltages increase over time due to interface states and fixed charges in the gate oxide of a semiconductor. As the absolute value of the gate to source voltage (Vgs) increases, NBTI worsens; i.e., the threshold voltage increase is a function of NBTI. Higher Vdd results in higher operating Vgs voltages and elevated temperatures increase the NBTI effect. NBTI is an important concern that requires frequent monitoring.
Another aging defect is caused by the phenomenon known as Hot Carrier Injection (HCI), which relates to the change in mobility of electrons/holes, over time. An electron or a “hole” gaining sufficient energy to pass through a potential barrier becomes a “hot carrier,” migrating to a different area of the device. For example, in a MOSFET device, an electron may be injected from the silicon substrate to the gate dielectric. The misplacement of the hot carrier degrades performance. As hot carrier injection increases with time, failure due to drain current reduction will eventually occur. As the drain to source voltage (Vds) increases, HCI worsens. Other aging factors are related to effects of temperature, and changes in channel length and gate oxide, for example. As temperature increases, both NBTI and HCI worsen.
Aging models have been created for use in simulation of designed circuits. In the simulation process for circuits that include, for example, JFETs, MESFETs, MOSFETs, and like elements, aging models with input bias values, for example, gate-to-source, Vgs, or drain-to-source, Vds voltages and the like are utilized. The bias voltages can be obtained through node voltages. Vgs can be computed as Vgs=Vg−Vs and Vds can be computed as Vds=Vd−Vs, where Vd and Vs are the node voltages at the drain and source of a transistor, respectively. The aging models also depend on an effective stress time that is a factor in estimating the effects of NBTI and HCI. Effective stress time is dependent on input switching activity, i.e., frequency, duty cycle, rise/fall time of signals at the gate of each transistor, and is a parameter in equations describing NBTI and HCI. One problem with conventional methods of simulation is that since each transistor in a circuit degrades differently, it is difficult to judge the overall age of the circuit when many transistors are involved.
A known simulation technique employs “SPICE” software. SPICE is a general-purpose circuit simulation program for nonlinear dc, nonlinear transient, and linear ac analysis. In SPICE simulations, bias voltages, such as Vgs and Vds voltages, are manually set using initial bias conditions. As the number of circuits increases, it becomes unwieldy, and infeasible for a designer to manually set the bias voltages for each circuit element. As an approach to alleviating these problems, bias value assumptions for the aging models have been made in lieu of individualized bias settings. For example, for transistor circuits, such solution assumes that Vgs=Vdd and Vds=Vdd for each transistor. However, the accuracy of the aging simulation model is significantly compromised since accurate bias voltages are not used.
The need thus exists for a more accurate and efficient aging simulation technique.